
setenv:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004006a8 <_init>:
  4006a8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4006ac:	910003fd 	mov	x29, sp
  4006b0:	94000052 	bl	4007f8 <call_weak_fn>
  4006b4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4006b8:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006c0 <.plt>:
  4006c0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006c4:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0xffd4>
  4006c8:	f947fe11 	ldr	x17, [x16, #4088]
  4006cc:	913fe210 	add	x16, x16, #0xff8
  4006d0:	d61f0220 	br	x17
  4006d4:	d503201f 	nop
  4006d8:	d503201f 	nop
  4006dc:	d503201f 	nop

00000000004006e0 <exit@plt>:
  4006e0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006e4:	f9400211 	ldr	x17, [x16]
  4006e8:	91000210 	add	x16, x16, #0x0
  4006ec:	d61f0220 	br	x17

00000000004006f0 <sprintf@plt>:
  4006f0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4006f4:	f9400611 	ldr	x17, [x16, #8]
  4006f8:	91002210 	add	x16, x16, #0x8
  4006fc:	d61f0220 	br	x17

0000000000400700 <fclose@plt>:
  400700:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400704:	f9400a11 	ldr	x17, [x16, #16]
  400708:	91004210 	add	x16, x16, #0x10
  40070c:	d61f0220 	br	x17

0000000000400710 <fopen@plt>:
  400710:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400714:	f9400e11 	ldr	x17, [x16, #24]
  400718:	91006210 	add	x16, x16, #0x18
  40071c:	d61f0220 	br	x17

0000000000400720 <__libc_start_main@plt>:
  400720:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400724:	f9401211 	ldr	x17, [x16, #32]
  400728:	91008210 	add	x16, x16, #0x20
  40072c:	d61f0220 	br	x17

0000000000400730 <memset@plt>:
  400730:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400734:	f9401611 	ldr	x17, [x16, #40]
  400738:	9100a210 	add	x16, x16, #0x28
  40073c:	d61f0220 	br	x17

0000000000400740 <system@plt>:
  400740:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400744:	f9401a11 	ldr	x17, [x16, #48]
  400748:	9100c210 	add	x16, x16, #0x30
  40074c:	d61f0220 	br	x17

0000000000400750 <__gmon_start__@plt>:
  400750:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400754:	f9401e11 	ldr	x17, [x16, #56]
  400758:	9100e210 	add	x16, x16, #0x38
  40075c:	d61f0220 	br	x17

0000000000400760 <abort@plt>:
  400760:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400764:	f9402211 	ldr	x17, [x16, #64]
  400768:	91010210 	add	x16, x16, #0x40
  40076c:	d61f0220 	br	x17

0000000000400770 <puts@plt>:
  400770:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400774:	f9402611 	ldr	x17, [x16, #72]
  400778:	91012210 	add	x16, x16, #0x48
  40077c:	d61f0220 	br	x17

0000000000400780 <fread@plt>:
  400780:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400784:	f9402a11 	ldr	x17, [x16, #80]
  400788:	91014210 	add	x16, x16, #0x50
  40078c:	d61f0220 	br	x17

0000000000400790 <printf@plt>:
  400790:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  400794:	f9402e11 	ldr	x17, [x16, #88]
  400798:	91016210 	add	x16, x16, #0x58
  40079c:	d61f0220 	br	x17

00000000004007a0 <__assert_fail@plt>:
  4007a0:	d0000090 	adrp	x16, 412000 <exit@GLIBC_2.17>
  4007a4:	f9403211 	ldr	x17, [x16, #96]
  4007a8:	91018210 	add	x16, x16, #0x60
  4007ac:	d61f0220 	br	x17

Disassembly of section .text:

00000000004007b0 <_start>:
  4007b0:	d280001d 	mov	x29, #0x0                   	// #0
  4007b4:	d280001e 	mov	x30, #0x0                   	// #0
  4007b8:	aa0003e5 	mov	x5, x0
  4007bc:	f94003e1 	ldr	x1, [sp]
  4007c0:	910023e2 	add	x2, sp, #0x8
  4007c4:	910003e6 	mov	x6, sp
  4007c8:	580000c0 	ldr	x0, 4007e0 <_start+0x30>
  4007cc:	580000e3 	ldr	x3, 4007e8 <_start+0x38>
  4007d0:	58000104 	ldr	x4, 4007f0 <_start+0x40>
  4007d4:	97ffffd3 	bl	400720 <__libc_start_main@plt>
  4007d8:	97ffffe2 	bl	400760 <abort@plt>
  4007dc:	00000000 	.inst	0x00000000 ; undefined
  4007e0:	004009b0 	.word	0x004009b0
  4007e4:	00000000 	.word	0x00000000
  4007e8:	00400d30 	.word	0x00400d30
  4007ec:	00000000 	.word	0x00000000
  4007f0:	00400db0 	.word	0x00400db0
  4007f4:	00000000 	.word	0x00000000

00000000004007f8 <call_weak_fn>:
  4007f8:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0xffd4>
  4007fc:	f947f000 	ldr	x0, [x0, #4064]
  400800:	b4000040 	cbz	x0, 400808 <call_weak_fn+0x10>
  400804:	17ffffd3 	b	400750 <__gmon_start__@plt>
  400808:	d65f03c0 	ret
  40080c:	00000000 	.inst	0x00000000 ; undefined

0000000000400810 <deregister_tm_clones>:
  400810:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  400814:	9101e000 	add	x0, x0, #0x78
  400818:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  40081c:	9101e021 	add	x1, x1, #0x78
  400820:	eb00003f 	cmp	x1, x0
  400824:	540000a0 	b.eq	400838 <deregister_tm_clones+0x28>  // b.none
  400828:	90000001 	adrp	x1, 400000 <_init-0x6a8>
  40082c:	f946e821 	ldr	x1, [x1, #3536]
  400830:	b4000041 	cbz	x1, 400838 <deregister_tm_clones+0x28>
  400834:	d61f0020 	br	x1
  400838:	d65f03c0 	ret
  40083c:	d503201f 	nop

0000000000400840 <register_tm_clones>:
  400840:	d0000080 	adrp	x0, 412000 <exit@GLIBC_2.17>
  400844:	9101e000 	add	x0, x0, #0x78
  400848:	d0000081 	adrp	x1, 412000 <exit@GLIBC_2.17>
  40084c:	9101e021 	add	x1, x1, #0x78
  400850:	cb000021 	sub	x1, x1, x0
  400854:	9343fc21 	asr	x1, x1, #3
  400858:	8b41fc21 	add	x1, x1, x1, lsr #63
  40085c:	9341fc21 	asr	x1, x1, #1
  400860:	b40000a1 	cbz	x1, 400874 <register_tm_clones+0x34>
  400864:	90000002 	adrp	x2, 400000 <_init-0x6a8>
  400868:	f946ec42 	ldr	x2, [x2, #3544]
  40086c:	b4000042 	cbz	x2, 400874 <register_tm_clones+0x34>
  400870:	d61f0040 	br	x2
  400874:	d65f03c0 	ret

0000000000400878 <__do_global_dtors_aux>:
  400878:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40087c:	910003fd 	mov	x29, sp
  400880:	f9000bf3 	str	x19, [sp, #16]
  400884:	d0000093 	adrp	x19, 412000 <exit@GLIBC_2.17>
  400888:	3941e260 	ldrb	w0, [x19, #120]
  40088c:	35000080 	cbnz	w0, 40089c <__do_global_dtors_aux+0x24>
  400890:	97ffffe0 	bl	400810 <deregister_tm_clones>
  400894:	52800020 	mov	w0, #0x1                   	// #1
  400898:	3901e260 	strb	w0, [x19, #120]
  40089c:	f9400bf3 	ldr	x19, [sp, #16]
  4008a0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008a4:	d65f03c0 	ret

00000000004008a8 <frame_dummy>:
  4008a8:	17ffffe6 	b	400840 <register_tm_clones>

00000000004008ac <generate_env>:
  4008ac:	a9b67bfd 	stp	x29, x30, [sp, #-160]!
  4008b0:	910003fd 	mov	x29, sp
  4008b4:	79003fa0 	strh	w0, [x29, #30]
  4008b8:	79003ba1 	strh	w1, [x29, #28]
  4008bc:	a9027fbf 	stp	xzr, xzr, [x29, #32]
  4008c0:	a9037fbf 	stp	xzr, xzr, [x29, #48]
  4008c4:	a9047fbf 	stp	xzr, xzr, [x29, #64]
  4008c8:	a9057fbf 	stp	xzr, xzr, [x29, #80]
  4008cc:	a9067fbf 	stp	xzr, xzr, [x29, #96]
  4008d0:	a9077fbf 	stp	xzr, xzr, [x29, #112]
  4008d4:	a9087fbf 	stp	xzr, xzr, [x29, #128]
  4008d8:	a9097fbf 	stp	xzr, xzr, [x29, #144]
  4008dc:	79403fa2 	ldrh	w2, [x29, #30]
  4008e0:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  4008e4:	91378001 	add	x1, x0, #0xde0
  4008e8:	910083a0 	add	x0, x29, #0x20
  4008ec:	97ffff81 	bl	4006f0 <sprintf@plt>
  4008f0:	910083a0 	add	x0, x29, #0x20
  4008f4:	97ffff93 	bl	400740 <system@plt>
  4008f8:	910083a0 	add	x0, x29, #0x20
  4008fc:	d2801002 	mov	x2, #0x80                  	// #128
  400900:	52800001 	mov	w1, #0x0                   	// #0
  400904:	97ffff8b 	bl	400730 <memset@plt>
  400908:	79403ba2 	ldrh	w2, [x29, #28]
  40090c:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400910:	91386001 	add	x1, x0, #0xe18
  400914:	910083a0 	add	x0, x29, #0x20
  400918:	97ffff76 	bl	4006f0 <sprintf@plt>
  40091c:	910083a0 	add	x0, x29, #0x20
  400920:	97ffff88 	bl	400740 <system@plt>
  400924:	910083a0 	add	x0, x29, #0x20
  400928:	d2801002 	mov	x2, #0x80                  	// #128
  40092c:	52800001 	mov	w1, #0x0                   	// #0
  400930:	97ffff80 	bl	400730 <memset@plt>
  400934:	910083a2 	add	x2, x29, #0x20
  400938:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  40093c:	91394001 	add	x1, x0, #0xe50
  400940:	aa0203e0 	mov	x0, x2
  400944:	a9400c22 	ldp	x2, x3, [x1]
  400948:	a9000c02 	stp	x2, x3, [x0]
  40094c:	f9400822 	ldr	x2, [x1, #16]
  400950:	f9000802 	str	x2, [x0, #16]
  400954:	f8417021 	ldur	x1, [x1, #23]
  400958:	f8017001 	stur	x1, [x0, #23]
  40095c:	910083a0 	add	x0, x29, #0x20
  400960:	97ffff78 	bl	400740 <system@plt>
  400964:	910083a0 	add	x0, x29, #0x20
  400968:	d2801002 	mov	x2, #0x80                  	// #128
  40096c:	52800001 	mov	w1, #0x0                   	// #0
  400970:	97ffff70 	bl	400730 <memset@plt>
  400974:	910083a2 	add	x2, x29, #0x20
  400978:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  40097c:	9139c001 	add	x1, x0, #0xe70
  400980:	aa0203e0 	mov	x0, x2
  400984:	a9400c22 	ldp	x2, x3, [x1]
  400988:	a9000c02 	stp	x2, x3, [x0]
  40098c:	f9400822 	ldr	x2, [x1, #16]
  400990:	f9000802 	str	x2, [x0, #16]
  400994:	b9401821 	ldr	w1, [x1, #24]
  400998:	b9001801 	str	w1, [x0, #24]
  40099c:	910083a0 	add	x0, x29, #0x20
  4009a0:	97ffff68 	bl	400740 <system@plt>
  4009a4:	d503201f 	nop
  4009a8:	a8ca7bfd 	ldp	x29, x30, [sp], #160
  4009ac:	d65f03c0 	ret

00000000004009b0 <main>:
  4009b0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4009b4:	910003fd 	mov	x29, sp
  4009b8:	b9001fa0 	str	w0, [x29, #28]
  4009bc:	f9000ba1 	str	x1, [x29, #16]
  4009c0:	f90017bf 	str	xzr, [x29, #40]
  4009c4:	b90033bf 	str	wzr, [x29, #48]
  4009c8:	3900d3bf 	strb	wzr, [x29, #52]
  4009cc:	9100eba3 	add	x3, x29, #0x3a
  4009d0:	9100f3a2 	add	x2, x29, #0x3c
  4009d4:	9100ffa1 	add	x1, x29, #0x3f
  4009d8:	9100a3a0 	add	x0, x29, #0x28
  4009dc:	940000a4 	bl	400c6c <paremeter_operation>
  4009e0:	79407ba0 	ldrh	w0, [x29, #60]
  4009e4:	794077a1 	ldrh	w1, [x29, #58]
  4009e8:	97ffffb1 	bl	4008ac <generate_env>
  4009ec:	52800000 	mov	w0, #0x0                   	// #0
  4009f0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4009f4:	d65f03c0 	ret

00000000004009f8 <create_partition_file>:
  4009f8:	a9b67bfd 	stp	x29, x30, [sp, #-160]!
  4009fc:	910003fd 	mov	x29, sp
  400a00:	a901ffbf 	stp	xzr, xzr, [x29, #24]
  400a04:	a902ffbf 	stp	xzr, xzr, [x29, #40]
  400a08:	a903ffbf 	stp	xzr, xzr, [x29, #56]
  400a0c:	a904ffbf 	stp	xzr, xzr, [x29, #72]
  400a10:	a905ffbf 	stp	xzr, xzr, [x29, #88]
  400a14:	a906ffbf 	stp	xzr, xzr, [x29, #104]
  400a18:	a907ffbf 	stp	xzr, xzr, [x29, #120]
  400a1c:	a908ffbf 	stp	xzr, xzr, [x29, #136]
  400a20:	52801580 	mov	w0, #0xac                  	// #172
  400a24:	b9009fa0 	str	w0, [x29, #156]
  400a28:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400a2c:	913a4003 	add	x3, x0, #0xe90
  400a30:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400a34:	913a8002 	add	x2, x0, #0xea0
  400a38:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400a3c:	913ac001 	add	x1, x0, #0xeb0
  400a40:	910063a0 	add	x0, x29, #0x18
  400a44:	97ffff2b 	bl	4006f0 <sprintf@plt>
  400a48:	910063a0 	add	x0, x29, #0x18
  400a4c:	97ffff3d 	bl	400740 <system@plt>
  400a50:	b9009fa0 	str	w0, [x29, #156]
  400a54:	b9409fa0 	ldr	w0, [x29, #156]
  400a58:	7100001f 	cmp	w0, #0x0
  400a5c:	54000061 	b.ne	400a68 <create_partition_file+0x70>  // b.any
  400a60:	52800000 	mov	w0, #0x0                   	// #0
  400a64:	14000002 	b	400a6c <create_partition_file+0x74>
  400a68:	12800000 	mov	w0, #0xffffffff            	// #-1
  400a6c:	a8ca7bfd 	ldp	x29, x30, [sp], #160
  400a70:	d65f03c0 	ret

0000000000400a74 <open_partition_file>:
  400a74:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400a78:	910003fd 	mov	x29, sp
  400a7c:	f9000fa0 	str	x0, [x29, #24]
  400a80:	f90017bf 	str	xzr, [x29, #40]
  400a84:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400a88:	913b8000 	add	x0, x0, #0xee0
  400a8c:	aa0003e1 	mov	x1, x0
  400a90:	f9400fa0 	ldr	x0, [x29, #24]
  400a94:	97ffff1f 	bl	400710 <fopen@plt>
  400a98:	f90017a0 	str	x0, [x29, #40]
  400a9c:	f94017a0 	ldr	x0, [x29, #40]
  400aa0:	f100001f 	cmp	x0, #0x0
  400aa4:	54000101 	b.ne	400ac4 <open_partition_file+0x50>  // b.any
  400aa8:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400aac:	913ba000 	add	x0, x0, #0xee8
  400ab0:	f9400fa1 	ldr	x1, [x29, #24]
  400ab4:	97ffff37 	bl	400790 <printf@plt>
  400ab8:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400abc:	913ec000 	add	x0, x0, #0xfb0
  400ac0:	94000093 	bl	400d0c <__do_abnormal>
  400ac4:	f94017a0 	ldr	x0, [x29, #40]
  400ac8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400acc:	d65f03c0 	ret

0000000000400ad0 <close_partition_file>:
  400ad0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400ad4:	910003fd 	mov	x29, sp
  400ad8:	f9000fa0 	str	x0, [x29, #24]
  400adc:	f9400fa0 	ldr	x0, [x29, #24]
  400ae0:	f100001f 	cmp	x0, #0x0
  400ae4:	54000060 	b.eq	400af0 <close_partition_file+0x20>  // b.none
  400ae8:	f9400fa0 	ldr	x0, [x29, #24]
  400aec:	97ffff05 	bl	400700 <fclose@plt>
  400af0:	d503201f 	nop
  400af4:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400af8:	d65f03c0 	ret

0000000000400afc <get_file_content>:
  400afc:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400b00:	910003fd 	mov	x29, sp
  400b04:	f90017a0 	str	x0, [x29, #40]
  400b08:	f90013a1 	str	x1, [x29, #32]
  400b0c:	b9001fa2 	str	w2, [x29, #28]
  400b10:	52801580 	mov	w0, #0xac                  	// #172
  400b14:	b9003fa0 	str	w0, [x29, #60]
  400b18:	f94017a0 	ldr	x0, [x29, #40]
  400b1c:	f100001f 	cmp	x0, #0x0
  400b20:	54000141 	b.ne	400b48 <get_file_content+0x4c>  // b.any
  400b24:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400b28:	913f2002 	add	x2, x0, #0xfc8
  400b2c:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400b30:	913c4001 	add	x1, x0, #0xf10
  400b34:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400b38:	913c8000 	add	x0, x0, #0xf20
  400b3c:	aa0203e3 	mov	x3, x2
  400b40:	52800b02 	mov	w2, #0x58                  	// #88
  400b44:	97ffff17 	bl	4007a0 <__assert_fail@plt>
  400b48:	b9801fa0 	ldrsw	x0, [x29, #28]
  400b4c:	f94017a3 	ldr	x3, [x29, #40]
  400b50:	aa0003e2 	mov	x2, x0
  400b54:	d2800021 	mov	x1, #0x1                   	// #1
  400b58:	f94013a0 	ldr	x0, [x29, #32]
  400b5c:	97ffff09 	bl	400780 <fread@plt>
  400b60:	b9003fa0 	str	w0, [x29, #60]
  400b64:	b9403fa0 	ldr	w0, [x29, #60]
  400b68:	7100001f 	cmp	w0, #0x0
  400b6c:	540000ec 	b.gt	400b88 <get_file_content+0x8c>
  400b70:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400b74:	913cc000 	add	x0, x0, #0xf30
  400b78:	97fffefe 	bl	400770 <puts@plt>
  400b7c:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400b80:	913f8000 	add	x0, x0, #0xfe0
  400b84:	94000062 	bl	400d0c <__do_abnormal>
  400b88:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400b8c:	913d4000 	add	x0, x0, #0xf50
  400b90:	b9403fa1 	ldr	w1, [x29, #60]
  400b94:	97fffeff 	bl	400790 <printf@plt>
  400b98:	52800000 	mov	w0, #0x0                   	// #0
  400b9c:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ba0:	d65f03c0 	ret

0000000000400ba4 <get_parameter>:
  400ba4:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400ba8:	910003fd 	mov	x29, sp
  400bac:	f9001fa0 	str	x0, [x29, #56]
  400bb0:	f9001ba1 	str	x1, [x29, #48]
  400bb4:	f90017a2 	str	x2, [x29, #40]
  400bb8:	f90013a3 	str	x3, [x29, #32]
  400bbc:	f9000fa4 	str	x4, [x29, #24]
  400bc0:	f9401fa0 	ldr	x0, [x29, #56]
  400bc4:	f100001f 	cmp	x0, #0x0
  400bc8:	54000141 	b.ne	400bf0 <get_parameter+0x4c>  // b.any
  400bcc:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400bd0:	913fe002 	add	x2, x0, #0xff8
  400bd4:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400bd8:	913c4001 	add	x1, x0, #0xf10
  400bdc:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400be0:	913d8000 	add	x0, x0, #0xf60
  400be4:	aa0203e3 	mov	x3, x2
  400be8:	52800e42 	mov	w2, #0x72                  	// #114
  400bec:	97fffeed 	bl	4007a0 <__assert_fail@plt>
  400bf0:	f9401fa0 	ldr	x0, [x29, #56]
  400bf4:	91016800 	add	x0, x0, #0x5a
  400bf8:	79400001 	ldrh	w1, [x0]
  400bfc:	f94013a0 	ldr	x0, [x29, #32]
  400c00:	79000001 	strh	w1, [x0]
  400c04:	f9401fa0 	ldr	x0, [x29, #56]
  400c08:	91016000 	add	x0, x0, #0x58
  400c0c:	79400001 	ldrh	w1, [x0]
  400c10:	f9400fa0 	ldr	x0, [x29, #24]
  400c14:	79000001 	strh	w1, [x0]
  400c18:	f9401fa0 	ldr	x0, [x29, #56]
  400c1c:	9100c000 	add	x0, x0, #0x30
  400c20:	39400001 	ldrb	w1, [x0]
  400c24:	f94017a0 	ldr	x0, [x29, #40]
  400c28:	39000001 	strb	w1, [x0]
  400c2c:	f94017a0 	ldr	x0, [x29, #40]
  400c30:	39400000 	ldrb	w0, [x0]
  400c34:	7100181f 	cmp	w0, #0x6
  400c38:	54000149 	b.ls	400c60 <get_parameter+0xbc>  // b.plast
  400c3c:	f94017a0 	ldr	x0, [x29, #40]
  400c40:	39400000 	ldrb	w0, [x0]
  400c44:	2a0003e1 	mov	w1, w0
  400c48:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400c4c:	913dc000 	add	x0, x0, #0xf70
  400c50:	97fffed0 	bl	400790 <printf@plt>
  400c54:	b0000000 	adrp	x0, 401000 <__PRETTY_FUNCTION__.4718+0x8>
  400c58:	91002000 	add	x0, x0, #0x8
  400c5c:	9400002c 	bl	400d0c <__do_abnormal>
  400c60:	52800000 	mov	w0, #0x0                   	// #0
  400c64:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400c68:	d65f03c0 	ret

0000000000400c6c <paremeter_operation>:
  400c6c:	d11103ff 	sub	sp, sp, #0x440
  400c70:	a9007bfd 	stp	x29, x30, [sp]
  400c74:	910003fd 	mov	x29, sp
  400c78:	f90017a0 	str	x0, [x29, #40]
  400c7c:	f90013a1 	str	x1, [x29, #32]
  400c80:	f9000fa2 	str	x2, [x29, #24]
  400c84:	f9000ba3 	str	x3, [x29, #16]
  400c88:	f9021fbf 	str	xzr, [x29, #1080]
  400c8c:	9100e3a0 	add	x0, x29, #0x38
  400c90:	d2808001 	mov	x1, #0x400                 	// #1024
  400c94:	aa0103e2 	mov	x2, x1
  400c98:	52800001 	mov	w1, #0x0                   	// #0
  400c9c:	97fffea5 	bl	400730 <memset@plt>
  400ca0:	97ffff56 	bl	4009f8 <create_partition_file>
  400ca4:	7100001f 	cmp	w0, #0x0
  400ca8:	54000080 	b.eq	400cb8 <paremeter_operation+0x4c>  // b.none
  400cac:	b0000000 	adrp	x0, 401000 <__PRETTY_FUNCTION__.4718+0x8>
  400cb0:	91006000 	add	x0, x0, #0x18
  400cb4:	94000016 	bl	400d0c <__do_abnormal>
  400cb8:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400cbc:	913a4000 	add	x0, x0, #0xe90
  400cc0:	97ffff6d 	bl	400a74 <open_partition_file>
  400cc4:	f9021fa0 	str	x0, [x29, #1080]
  400cc8:	9100e3a0 	add	x0, x29, #0x38
  400ccc:	52808002 	mov	w2, #0x400                 	// #1024
  400cd0:	aa0003e1 	mov	x1, x0
  400cd4:	f9421fa0 	ldr	x0, [x29, #1080]
  400cd8:	97ffff89 	bl	400afc <get_file_content>
  400cdc:	9100e3a0 	add	x0, x29, #0x38
  400ce0:	f9400ba4 	ldr	x4, [x29, #16]
  400ce4:	f9400fa3 	ldr	x3, [x29, #24]
  400ce8:	f94013a2 	ldr	x2, [x29, #32]
  400cec:	f94017a1 	ldr	x1, [x29, #40]
  400cf0:	97ffffad 	bl	400ba4 <get_parameter>
  400cf4:	f9421fa0 	ldr	x0, [x29, #1080]
  400cf8:	97ffff76 	bl	400ad0 <close_partition_file>
  400cfc:	52800000 	mov	w0, #0x0                   	// #0
  400d00:	a9407bfd 	ldp	x29, x30, [sp]
  400d04:	911103ff 	add	sp, sp, #0x440
  400d08:	d65f03c0 	ret

0000000000400d0c <__do_abnormal>:
  400d0c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400d10:	910003fd 	mov	x29, sp
  400d14:	f9000fa0 	str	x0, [x29, #24]
  400d18:	90000000 	adrp	x0, 400000 <_init-0x6a8>
  400d1c:	913e2000 	add	x0, x0, #0xf88
  400d20:	f9400fa1 	ldr	x1, [x29, #24]
  400d24:	97fffe9b 	bl	400790 <printf@plt>
  400d28:	52800000 	mov	w0, #0x0                   	// #0
  400d2c:	97fffe6d 	bl	4006e0 <exit@plt>

0000000000400d30 <__libc_csu_init>:
  400d30:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400d34:	910003fd 	mov	x29, sp
  400d38:	a901d7f4 	stp	x20, x21, [sp, #24]
  400d3c:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0xffd4>
  400d40:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0xffd4>
  400d44:	91374294 	add	x20, x20, #0xdd0
  400d48:	913722b5 	add	x21, x21, #0xdc8
  400d4c:	a902dff6 	stp	x22, x23, [sp, #40]
  400d50:	cb150294 	sub	x20, x20, x21
  400d54:	f9001ff8 	str	x24, [sp, #56]
  400d58:	2a0003f6 	mov	w22, w0
  400d5c:	aa0103f7 	mov	x23, x1
  400d60:	9343fe94 	asr	x20, x20, #3
  400d64:	aa0203f8 	mov	x24, x2
  400d68:	97fffe50 	bl	4006a8 <_init>
  400d6c:	b4000194 	cbz	x20, 400d9c <__libc_csu_init+0x6c>
  400d70:	f9000bb3 	str	x19, [x29, #16]
  400d74:	d2800013 	mov	x19, #0x0                   	// #0
  400d78:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400d7c:	aa1803e2 	mov	x2, x24
  400d80:	aa1703e1 	mov	x1, x23
  400d84:	2a1603e0 	mov	w0, w22
  400d88:	91000673 	add	x19, x19, #0x1
  400d8c:	d63f0060 	blr	x3
  400d90:	eb13029f 	cmp	x20, x19
  400d94:	54ffff21 	b.ne	400d78 <__libc_csu_init+0x48>  // b.any
  400d98:	f9400bb3 	ldr	x19, [x29, #16]
  400d9c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400da0:	a942dff6 	ldp	x22, x23, [sp, #40]
  400da4:	f9401ff8 	ldr	x24, [sp, #56]
  400da8:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400dac:	d65f03c0 	ret

0000000000400db0 <__libc_csu_fini>:
  400db0:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400db4 <_fini>:
  400db4:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400db8:	910003fd 	mov	x29, sp
  400dbc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400dc0:	d65f03c0 	ret
